Job Details

Job Information

PMU Design Verification Engineer: Analog & Mixed Signal Engineer
AWM-9043-PMU Design Verification Engineer: Analog & Mixed Signal Engineer
5/2/2026
5/7/2026
Negotiable
Permanent

Other Information

www.apple.com
Cupertino, CA, 95015, USA
Cupertino
California
United States
95015

Job Description

No Video Available
 

Role Number: 200658493-0836

Summary

Did you know that Apple is hiring analog & mixed signal verification engineers? We are looking for engineers that are enthusiastic to find bugs! You have the opportunity to work with a creative team to craft test plans and enable production-quality first silicon. As a member of the analog and mixed signal verification team, you will be working with specialists for full-chip verification of the state of the art mixed-signal systems used in Apple’s world-leading products!

Description

In this role, you will be responsible for ensuring high quality silicon for IC chips and IPs. Daily work involves verification of mixed signal IC designs using a combination of analog circuits and RTL in the same simulation. Responsibilities include all phases of pre-silicon verification from early discussions with architects, reviewing specifications, writing verification plans, running simulations, triaging issues, and reviewing results with the team.
• Develop detailed test and coverage plans based on IC specifications.
• Completion of verification plans from beginning to end: test bench and environment bring-up, regressions, failure debug, and tape-out.
• Develop verification methodology suitable for the IP, ensuring scalability and portability.
• Develop verification environment, including stimuli, checkers, assertions, trackers, and coverage.
• Sign-off mixed signal designs in preparation for tapeout.

Minimum Qualifications

  • BS and a minimum of 3 years of relevant industry experience

Preferred Qualifications

  • Ability to verify analog/mixed-signal designs in a collaborative team environment.

  • Proficient in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code.

  • Familiarity with authoring analog assertion checks to catch bugs.

  • Capability to identify failure mechanisms and review verification results in analog IC designs.

  • Ability to write test plans, present results, and communicate clearly with multi-functional teams.

  • Comfortable with running simulations through compute clusters while optimizing simulation and wall time.

  • Understanding of both power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, bandgaps, data converters, and/or clock generators.

  • Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, gate level simulations.

  • Experience developing scalable and portable test benches.

  • A background that includes scripting or programming languages is preferred. These include, but are not limited to, TCL, Skill, Python, and/or PERL.

  • Your familiarity with analog behavioral models is also a plus.

Other Details

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