Job Details

CAD Gate-level 3DIC EM/IR Engineer

Austin, Texas, United States

Hardware

Summary

Posted: Feb 13, 2025

Role Number: 200591382

Imagine what you could do here! At Apple, new ideas have a way of becoming phenomenal products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple. The people who work here have reinvented entire industries with Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices - we continue to strengthen our commitment to leave the world better than we found it! As a key member of our best-in-class CAD Group, you will be part of building innovative designs. We will apply your hands-on experience in power EM/IR analysis to develop, define and refine the methodologies and flows for gate-level, as well as transistor level designs. Major tasks will include functional static / dynamic IR analysis, scan mode IVD analysis, package and interposer model handling, power EM analysis, SigEM, power switch modeling, design abstract and reuse for EM/IR purposes, IP / SoC level EMIR sign-off / ECO, and much more. Are you ready to join some of the world's leading engineers, and help us deliver the next generation of ground-breaking Apple products?

Description

In this highly visible role, your primary responsibilities will include:
- Development of custom EM/IR solutions which scale with accuracy and capacity challenges.
- Streamline and automate EM/IR flow with ownership of the entire flow.
- Support and collaborate with design groups (Physical-design and integration, Circuit-design / Power / Package & System / Technology) on their EM/IR requirements for various post layout flows.
- Work side by side with EDA vendors and foundries for tool qualification, debug and enhancement.

Minimum Qualifications

• Experience in at least one of Tcl, Python or Perl scripting languages.

• Coursework or projects in one of the analysis involved in EM/IR - extraction, timing, noise, simulation, physical design and verification

• Minimum requirement of BS

Preferred Qualifications

• Experience in theory, EDA Tool, or CAD flow relevant to EM/IR

• Degree in Computer Engineering or Electrical Engineering

• Ability to drive and complete tasks with guidance.

• Excellent communication and presentation skills.

• Hands on knowledge of industry leading EMIR tools e.g. Voltus, VoltusFi, RedHawk-SC, Totem.

• Experience in development of large scale software in multi user, multi site environment.

• Hands on experience with analysis, optimization and debugging of IR/IVD/Electromigration issues on high performance, large scale designs and silicons.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

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Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you’re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

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