Job Details

Job Information

ASIC Power Engineer
AWM-5242-ASIC Power Engineer
10/10/2025
10/15/2025
Negotiable
Permanent

Other Information

www.apple.com
Irvine, CA, 92604, USA
Irvine
California
United States
92604

Job Description

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ASIC Power Engineer

Irvine, California, United States

Hardware

Summary

Posted: Oct 09, 2025

Role Number: 200624549-1697

We are seeking an ASIC Power Engineer to drive SoC power simulation, analysis and optimization for next-generation wireless SOC products. This role requires deep technical expertise in power estimation and a passion for developing highly power-efficient SoCs that enable breakthrough wireless experience.

Description

In this highly visible role, you will be responsible for SoC power estimation, use case power analysis, and driving future SoC power optimization strategies. You will work with a team of talented engineers to integrate innovative power solutions and deliver industry-leading power efficiency.

The position focuses on SoC power estimation and optimization for power-critical wireless products.

  • Work with architects to define power-critical use cases and scenarios.
  • Establish power targets and collaborate with cross-functional teams to achieve optimization goals.
  • Define comprehensive test cases within design verification environments.
  • Generate accurate pre-silicon power estimations for design decision-making.
  • Analyze power consumption patterns and identify optimization opportunities.
  • Develop SoC power models for new architecture designs, enabling performance/power trade-off analysis.
  • Understand software and system-level interactions that impact overall power consumption.
  • Partner with lab and silicon characterization teams to correlate models with measured silicon data.

Responsibilities

  • Perform comprehensive SoC power simulation and analysis using PtPx and PPRTL tools across multiple wireless use cases and operating scenarios.

  • Develop and maintain accurate power models for new wireless SoC architectures, enabling early power-performance trade-off analysis during design phases.

  • Collaborate with silicon design teams, architects, and verification engineers to define power-critical test scenarios and establish realistic power targets for wireless connectivity features.

  • Drive pre-silicon power estimation and post-silicon correlation activities, working closely with Silicon validation teams to validate and refine power models against measured silicon data.

  • Identify and quantify power optimization opportunities across architecture, RTL, and physical implementation levels, providing actionable recommendations to design teams.

  • Analyze system-level power interactions between wireless subsystems and other SoC components to optimize overall power efficiency.

  • Create and maintain automated power analysis flows and methodologies to support multiple concurrent SoC development programs.

  • Present power analysis results and optimization strategies to cross-functional teams and senior leadership.

Minimum Qualifications

  • BS in Electrical Engineering, Computer Engineering, or related technical field and 3+ years of relevant industry experience.

  • Hands-on experience with PtPx and PPRTL power analysis tools.

  • Experience in SoC power simulation, modeling, and analysis flow development.

  • Experience in ASIC power estimation, analysis and optimization methodologies.

  • Experience in power model development for IPs.

  • Hands-on experience in correlating pre-silicon power models with measured silicon data and driving model accuracy improvements through systematic debugging.

  • Proficiency in scripting languages including Python, Perl, or TCL.

Preferred Qualifications

  • Understanding of electrical properties of on-die PDN, power gating, package and system power delivery.

  • Hands-on experience with SoC power domains and power management unit (PMU) interactions in complex multi-core chipsets.

  • Knowledge of power impact at architecture, logic design, and circuit levels.

  • Experience in power model development for complex SoCs.

  • Familiarity with SoC design flow and methodology.

  • Strong communication skills to collaborate effectively across multiple engineering disciplines.

  • Knowledge of WiFi or Bluetooth standards and protocols.

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $139,500 and $258,100, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.Learn more about Apple Benefits. (https://www.apple.com/careers/us/benefits.html)

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program (https://www.apple.com/jobs/pdf/EverifyPosterEnglish.pdf) .

Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you’re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

Other Details

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