Job Details

DDR Design Engineer

Beaverton, Oregon, United States

Hardware

Summary

Posted: Oct 21, 2024

Role Number: 200574682

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and unusually hardworking DDR Design Engineer. As a member of our dynamic group, you will have the rare and great opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day.

You will join the DDR PHY design team. We provide outstanding PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study, architecture definition, design and verification, to silicon bring-up and characterization.

Description

In this role, you will be responsible for the following:
Performing concept studies and provide direction in terms of performance, gate count and power for various digital designs.
Writing detailed design specification and test plans in close collaboration with architecture, circuit designers and verification engineers.
Providing high-quality RTL description, including assertions, for the design.
Formal tools and static checkers will be used to guarantee RTL quality.
Supporting design verification to insure bug-free first silicon.
Driving functional and code coverage as well as timing closure for your designs.
Supporting silicon bring-up, performance and power characterization.

Minimum Qualifications

• BS degree in technical discipline with minimum 10 years of relevant experience.

Preferred Qualifications

• RTL design using Verilog or SystemVerilog, assertion writing

• Design of state machines, data paths, arbitration and clock domain crossing logic

• Logic synthesis, timing constraints

• Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL

• Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking

• Prior experience in DDR PHY design and mixed-signal environment is a plus

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program (https://www.apple.com/jobs/pdf/EverifyPosterEnglish.pdf) .

Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you’re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

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