Job Details

Job Information

CPU Clock Implementation Engineer
AWM-4290-CPU Clock Implementation Engineer
11/28/2025
12/3/2025
Negotiable
Permanent

Other Information

www.apple.com
Santa Clara, CA, 95054, USA
Santa Clara
California
United States
95054

Job Description

No Video Available
 

Role Number: 200605926-3760

Summary

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!

Apple’s Silicon Engineering Group (SEG) is hiring skilled engineers for CPU. As a CPU Clock Implementation Engineer, you will be driving the planning, design, implementation, and analysis of clock.

Description

As a CPU Clock Implementation Engineer, you will participate in the following:

• Work on clock planning, building simulation models, and physical implementation
• Work on clock analysis
• Engage on physical design of blocks
• Scripting to automate tasks and improve efficiency

Minimum Qualifications

  • Minimum BS and 10+ years of relevant industry experience

  • Programming and scripting experience in Perl and TCL

Preferred Qualifications

  • The ideal candidate will have physical design, analysis, and verification experience working on a large processor and/or SoC designs

  • Knowledge of industry standards and practices in physical design, analysis, and physical verification

  • Experience in developing and implementing clock specifications

  • Solid knowledge of low power design, physical construction, Spice, formal verification, physical verification, and DFM

  • Understanding of std cell architecture, design, and characterization flows

  • Understand reliability aspects of clock cell design

  • Experience understanding usage patterns and impact of std cells on high speed CPU design is a plus

  • Proven understanding of CMOS circuit design

  • Layout design background is a plus

  • Knowledge of extraction and STA methodology and tools

  • Knowledge of computer architecture

  • Strong communication skills

  • Ability to work well in a team, problem solver, and self-motivated

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Other Details

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