Job Details

Physical Design Engineer

Cupertino, California, United States

Hardware

Summary

Posted: May 22, 2025

Weekly Hours: 40

Role Number: 200605061

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn’t have imagined, and now, can’t imagine living without. It’s the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Perform all aspects of Physical Design and implementation RTL to GDS, including initializing the floor plan, performing pin assignments, placing hard macros, and customizing critical routes. Perform Synthesis, Power, Clock Distribution, Place and Route, Timing closure, Power & Noise to make sure design specs and requirements are met. Perform Analysis and Physical and STA Verification to ensure Performance, Area, and Power are optimized at a high standard. Perform DRC and LVS to verify layout design precision. Participate in CAD Physical Design methodologies. Provide feedback on new features, customize default flow steps, and assist in flow development automation in Chip Integration to facilitate handshaking between partitions. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100- $214,500/yr and your base pay will depend on your skills, qualifications, experience, and location.

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility
requirements and other terms of the applicable plan or program.

Minimum Qualifications

• Master’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering or related field, and 1 year of experience in the job offered or related occupation.

• 1 year of experience in each of the following skills is required:

• Using Cadence or Synopsys Physical Design tool, including experience analyzing design routability.

• Experience with Synthesis and timing constraint setup.

• Experience in root-causing LVS DRC ERC issues and close PDV.

• Experience with APR flow and customization for each step.

• Understanding of CTS, experience optimizing clock skew and insertion delay.

• Experience in writing Tcl Perl Python scripts for physical design data mining and flow customization.

• Experience analyzing setup/hold violations, and experience recommending timing ECO.

• Experience in power techniques and implementing power gating.

• Collecting PPA data and understanding the tradeoff between power and performance.

• Running and analyzing EMIR and experience avoiding hot spots by construction.

Preferred Qualifications

• N/A

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program (https://www.apple.com/jobs/pdf/EverifyPosterEnglish.pdf) .

Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you’re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.